Website SIEMENS Digital Industries Software

Where today meets tomorrow

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Education: Bachelors or Masters in EE or CE.

At least three years of experience in IC/VLSI design and specifically IC/VLSI testing and design for testability. Experience with design, simulation, and verification of IC/VLSI circuits and systems, design verification and product test generation preferred. In-depth understanding of Design for Test (DFT) structures is required. This should include at least in part scan-based testing, Test Compression, Memory BIST, Logic BIST, and Boundary Scan (1149.1) as well as Diagnosis of test failures. Knowledge of scan data compression methodologies and ATPG flows and or MemoryBIST Flows is desired.


CAD Tool Experience a plus: Synthesis, Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan. Strong troubleshooting skills and ability to break a complex problem into its components. Excellent interpersonal communication skills and customer facing skills are a must.

Preferred experience in specific areas: Operating Systems: UNIX, Linux. Languages: Verilog (Behavioral, RTL, gate level), System Verilog, VHDL (Behavioral, RTL, gate level), TCL




Organization: Digital Industries

Company: Siemens Industry Software Inc.

Experience Level: Experienced Professional

Job Type: Full-time


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